- Explain how memory capacity, memory bandwidth, and compute each limit local model performance
- Calculate peak memory bandwidth from transfer rate, bus width, and channel count
- Apply the roofline model to classify decode and prefill as memory-bound or compute-bound
- Derive the arithmetic intensity of matrix-vector work as a function of batch size and bits per weight
- Convert sparse and low-precision headline TOPS into dense FP16-class compute for comparison
Before this: Why Run AI Locally?, Parameters and Model Size, Quantization
Spec sheets for AI computers are full of big numbers, and most of them do not tell you what you actually want to know: will this model fit, and how fast will it answer? Three resources decide almost everything. Learn to read those and you can judge any machine.
The three resources
Think of a model as a huge reference book and the processor as a reader who must flip through the entire book to write each word of an answer.
- Memory capacity is the size of the desk. The whole book must fit on it, or the reader cannot work at all.
- Memory bandwidth is how fast the reader can flip pages. Since every word requires going through the book, this sets the writing speed.
- Compute is how fast the reader thinks. It matters most when reading your question, because a long prompt can be processed many words at a time.
Memory capacity: what fits
The weights of a model take roughly parameters × bits per weight ÷ 8 bytes, plus about 5%. A parameter is one learned number; bits per weight depends on quantization, which means storing each number with fewer bits to save space.
On top of the weights you need room for the KV cache (the model's working memory of the conversation so far, which grows with context length) and about 1.5 GB of runtime overhead.
Worked examples, using the same method as the site's AI Index:
- An 8-billion-parameter (8B) model at about 4.8 bits per weight: 8 × 4.8 ÷ 8 ≈ 4.8 GB, about 5 GB with overhead in the file.
- A 70B model at 4-bit quantization: about 40–42 GB.
- The same 70B model at 16-bit: about 2 bytes per parameter, roughly 140 GB.
The Index treats a model as fitting when the total need is at most 85% of usable memory, leaving headroom for the operating system and longer conversations.
Memory bandwidth: generation speed
Bandwidth is how many gigabytes per second the processor can read from memory. When generating text one token at a time, the chip must read essentially all of the model's active weights for every token. So a model that is 5 GB on a chip with about 1,000 GB/s of bandwidth can, in principle, generate far faster than the same model on a chip with 250 GB/s. The next lesson turns this into a formula.
Compute: prompt processing
Compute is measured in TFLOPS, trillions of floating-point operations per second. Reading your prompt (called prefill) costs about 2 × parameters operations per token, but the tokens can be processed in parallel, so this stage is limited by compute rather than bandwidth. A chip with weak compute will pause noticeably before answering a long prompt, even if it then generates text at a decent pace.
Unified memory versus discrete VRAM
A discrete GPU is a separate graphics card with its own memory, called VRAM. VRAM is very fast but limited in size. As of November 2026, NVIDIA's GeForce RTX 5090 has 32 GB of VRAM at 1,792 GB/s.
A unified-memory machine shares one pool of memory between the CPU and the built-in GPU. The pool can be much larger, but it is usually slower:
| Example chip or card (published specs) | Memory | Bandwidth |
|---|---|---|
| NVIDIA GeForce RTX 5090 (discrete GPU) | 32 GB VRAM | 1,792 GB/s |
| Apple M5 Ultra (unified) | up to 512 GB | up to about 1,200 GB/s |
| NVIDIA DGX Spark, GB10 chip (unified) | 128 GB | 273 GB/s |
| AMD Ryzen AI Max+ 395 (unified) | up to 128 GB | 256 GB/s |
On a discrete GPU, usable AI memory is the VRAM. On unified-memory machines, two separate limits apply, and it helps to keep them apart:
- The operating-system reserve. The OS and your other apps need some memory. The site's AI Index models usable memory as total memory minus a reserve: 8 GB on macOS and Windows, 4 GB on Linux or on any machine with 16 GB or less.
- The macOS GPU cap. By default, macOS limits how much unified memory the GPU may use, at roughly 75% of RAM on large configurations (a smaller share on small ones). The cap can be raised, for example with
sudo sysctl iogpu.wired_limit_mb=<megabytes>, which lasts until the next reboot. The Index assumes this cap has been raised; on a Mac left at default settings, the real limit is the lower of the two.
On AMD's Ryzen AI Max systems, a 128 GB machine can assign up to 96 GB to the GPU.
Offloading to system RAM
If a model is too big for VRAM, many runtimes can keep part of it in ordinary system RAM. It will run, but slowly, because speed drops toward the bandwidth of system RAM. Dual-channel DDR5-6000, for example, peaks at about 96 GB/s (6,000 million transfers × 8 bytes × 2 channels), far below a high-end GPU. Offloading is a useful way to try a model, not a substitute for enough fast memory.
NPUs: present, but mostly unused for LLMs
An NPU (neural processing unit) is a low-power AI accelerator built into many recent laptop chips. It is efficient for small, always-on tasks like background blur or speech features. As of November 2026, the most popular local LLM tools, such as Ollama and LM Studio, do not run models on the NPU; they use the GPU and CPU. NPU support exists in narrower, vendor-specific tools (for example AMD's FastFlowLM and Lemonade, Intel's OpenVINO GenAI) and as experimental llama.cpp work for Qualcomm's Hexagon NPU. Apple's Neural Engine is not used by MLX. NPUs also typically share the same memory and bandwidth as the rest of the chip, so they would not raise the bandwidth ceiling on generation anyway.
Sparse versus dense TOPS
Vendors often advertise TOPS (trillions of operations per second) or "AI TOPS" measured with 2:4 sparsity, a trick where half of the numbers in a matrix are zero and skipped. Ordinary LLM inference does not use that pattern, so real dense throughput is about half the headline figure. For example, NVIDIA lists the DGX Spark at up to 1 petaFLOP of FP4 compute "with sparsity", so dense FP4 is roughly half that.
Power, heat, and storage
- Power and thermals. The RTX 5090 is rated at 575 W of board power; the DGX Spark ships with a 240 W power supply. High power means more heat, louder fans, and higher electricity costs, and sustained loads can cause thermal throttling in small cases or laptops.
- Storage speed. Models are loaded from disk into memory. A 40 GB model loads in seconds from a fast NVMe SSD and much longer from a hard drive or network share. Storage speed does not affect generation once loaded, but it matters if you switch models often. Model files are large, so plan for plenty of disk space too.
Going deeper
Where bandwidth numbers come from
Peak memory bandwidth is a product of three numbers:
Dual-channel DDR5-6000 has a 64-bit (8-byte) bus per channel: GB/s, as stated above. A graphics card with a 512-bit GDDR7 bus at 28 Gb/s per pin gives GB/s, the RTX 5090 figure. These are theoretical peaks; real kernels reach a fraction, which is why the Index multiplies by 0.55 for decode.
The roofline model
The roofline model (Williams, Waterman and Patterson, 2009) answers a precise question: for a given piece of work, is the chip limited by compute or by memory? It uses three quantities:
- : peak compute in FLOP/s,
- : peak memory bandwidth in bytes/s,
- : arithmetic intensity, the FLOPs performed per byte moved from memory.
The attainable throughput is
Plotted against , this is a sloped line (memory-bound) that flattens into a horizontal roof (compute-bound). The corner, the ridge point, is at . Work with is memory-bound; work with is compute-bound.
Arithmetic intensity of decode and prefill
Most of an LLM's work is multiplying a weight matrix of shape by activation vectors. Each weight is used in one multiply and one add per token, so a single token costs FLOPs, while loading the weights at bits each moves bytes. If tokens share one pass over the weights,
(This ignores reading activations and the KV cache, which only lowers further for decode.)
- Decode, one user: . At 4.8 bits, FLOP/byte. At 16-bit, .
- Decode, batch of users: , so at 4.8 bits. This is why batching raises server throughput.
- Prefill of a 1,000-token prompt: , FLOP/byte.
Worked example
Take an illustrative chip with dense TFLOPS and GB/s. The ridge point is FLOP/byte.
- Single-user decode, : attainable TFLOPS, under 2% of peak. The chip's compute sits mostly idle; bandwidth decides speed.
- Batch of 32: , attainable TFLOPS, about 53% of peak. Same bandwidth, about 32 times the useful work per byte.
- Batch needed to reach the ridge: .
- Prefill of 1,000 tokens: , so compute-bound at the full 200 TFLOPS.
def intensity(tokens_sharing_weights, bits):
"""FLOPs per byte of weights: 2 FLOPs per weight per token."""
return 2 * tokens_sharing_weights / (bits / 8)
def attainable_tflops(peak_tflops, bw_gbs, flops_per_byte):
return min(peak_tflops, bw_gbs * flops_per_byte / 1000) # GB/s x FLOP/B = GFLOP/s
peak, bw = 200, 1000 # illustrative chip: ridge = 200 FLOP/byte
for name, n in [("decode, batch 1", 1), ("decode, batch 32", 32), ("prefill, 1,000 tokens", 1000)]:
I = intensity(n, 4.8)
att = attainable_tflops(peak, bw, I)
print(f"{name:22s} I={I:7.1f} FLOP/B attainable={att:6.1f} TFLOPS ({att/peak:.0%} of peak)")
This is the formal reason behind the three-resource picture: single-user decode lives far left of the ridge (bandwidth), and prefill lives far right (compute).
From headline TOPS to a usable number
Vendors quote peak throughput for a specific precision and often with 2:4 sparsity. To compare chips on the dense, 16-bit-class compute that matters for prefill, the Index applies simple conversions: halve a sparse figure, then divide FP8 figures by 2 and FP4 figures by 4 to express them in FP16-class terms (each halving of precision roughly doubles peak throughput on hardware that supports it). For a figure of 1 petaFLOP FP4 with sparsity: dense FP4 ≈ 500 TFLOPS, FP16-class ≈ 125 TFLOPS. The Index then assumes prefill reaches about 30% of that dense peak:
with in FLOP/s and the active parameters. For a 70B dense model on 125 TFLOPS: tokens/s, so an 8,000-token prompt takes about 30 seconds. These conversions are estimates; a measured prompt-processing benchmark always wins.
Common pitfalls
- Comparing sparse TOPS with dense TFLOPS. Halve sparse figures, and make sure both numbers are for the same precision (INT8, FP8, FP4, FP16 are not interchangeable).
- Adding NPU TOPS to GPU TOPS. The popular LLM runtimes do not use both at once, and both share the same memory bandwidth.
- Treating peak bandwidth as achieved bandwidth. Real decode reaches a fraction of the spec; the Index uses 55%.
- Mixing GB and GiB, or Gb and GB. One GiB is about 1.074 GB, and link speeds in Gb/s are eight times smaller in GB/s.
- Ignoring sustained behavior. Laptops and small cases can throttle under long loads, so short benchmarks overstate long jobs.
In practice
- When comparing machines, find three numbers first: usable AI memory, memory bandwidth, and dense compute. Ignore sparse TOPS headlines.
- Check fit with the rule of thumb: weights + KV cache + 1.5 GB must be at most 85% of usable memory.
- Treat system-RAM offload and NPUs as bonuses, not reasons to buy.
- The AI Hardware & Model Index lists these numbers for many machines and shows which models fit; its methodology tab explains the formulas.
Key takeaways
- Memory capacity decides whether a model fits, memory bandwidth mostly decides generation speed, and compute mostly decides how fast a prompt is read.
- A model's memory need is about parameters times bits per weight divided by 8, plus about 5%, plus the KV cache and about 1.5 GB of overhead.
- Discrete GPUs have fast but limited VRAM; unified-memory machines offer larger pools at lower bandwidth, minus an operating-system reserve (and, on a Mac at default settings, a GPU cap of roughly 75% of RAM).
- Offloading to system RAM lets oversized models run but at close to system-RAM speed, and most popular LLM tools do not use NPUs as of November 2026.
- Headline AI TOPS are often quoted with sparsity, so real dense throughput is roughly half.
Terms in this lesson
- Memory capacity
- How much data the processor's memory can hold, which decides whether a model fits.
- Memory bandwidth
- How many gigabytes per second the processor can read from memory, the main limit on text generation speed.
- TFLOPS
- Trillions of floating-point operations per second, a measure of raw compute.
- VRAM
- The dedicated memory on a discrete graphics card.
- Unified memory
- A single memory pool shared by the CPU and built-in GPU.
- NPU
- A neural processing unit, a low-power AI accelerator built into many recent chips.
- 2:4 sparsity
- A structured-sparsity pattern in which two of every four values in a matrix are zero, letting supporting hardware skip them; vendors often quote headline TOPS with it.
- Arithmetic intensity
- The number of floating-point operations performed per byte moved from memory for a given piece of work.
- Roofline model
- A performance model in which attainable throughput is the minimum of peak compute and bandwidth multiplied by arithmetic intensity.
- Ridge point
- The arithmetic intensity, peak compute divided by peak bandwidth, at which work switches from memory-bound to compute-bound.
Check your understanding
- 1.
Two machines have the same memory capacity, but one has three times the memory bandwidth. What mostly changes for a model that fits on both?
- 2.
A chip is advertised at 200 AI TOPS measured with 2:4 sparsity. What is a reasonable estimate of its dense throughput for LLM inference?
- 3.
A 70B model at 4-bit needs about 42 GB but your GPU has 32 GB of VRAM. If you offload the rest to system RAM, what happens?
- 4.
A chip offers 400 dense TFLOPS and 2,000 GB/s of memory bandwidth. Where is its roofline ridge point?
- 5.
What is the theoretical peak bandwidth of dual-channel DDR5-5600 (64-bit bus per channel)?
Exercises
Work each problem before opening the solution.
- Exercise 1Core
A unified-memory chip uses LPDDR5X-8533 on a 256-bit bus. Compute its theoretical peak bandwidth, and its effective decode bandwidth under the Index's 0.55 factor.
Show solution
A 256-bit bus is 32 bytes. Peak GB/s. Effective decode bandwidth ≈ 0.55 × 273 ≈ 150 GB/s.
- Exercise 2Core
A chip has 100 dense TFLOPS and 500 GB/s. For a model stored at 8 bits per weight, what batch size brings decode to the ridge point? What does that imply for a single user?
Show solution
Ridge FLOP/byte. At 8 bits, , so . A single user (, ) uses about 1% of peak compute; decode is firmly memory-bound and speed is set by bandwidth.
- Exercise 3Core
A device is advertised at 1,000 TFLOPS of FP4 "with sparsity". Using the Index's conversions, estimate its FP16-class dense compute and the prefill time for a 4,000-token prompt to a 32B dense model.
Show solution
Dense FP4 ≈ 1,000 ÷ 2 = 500 TFLOPS; FP16-class ≈ 500 ÷ 4 = 125 TFLOPS. Prefill rate ≈ 0.3 × 125×10^12 ÷ (2 × 32×10^9) = 3.75×10^13 ÷ 6.4×10^10 ≈ 586 tokens/s. Time ≈ 4,000 ÷ 586 ≈ 6.8 s. Treat as an estimate; measured prompt-processing speed is better.
- Exercise 4Challenge
Write a Python function
classify(peak_tflops, bw_gbs, tokens, bits)that returns whether the work is memory- or compute-bound, the fraction of peak compute attainable, and the batch size needed to reach the ridge. Test it on (200, 1000, 1, 4.8) and (200, 1000, 512, 4.8).Show solution
def classify(peak_tflops, bw_gbs, tokens, bits): ridge = peak_tflops * 1000 / bw_gbs # FLOP per byte I = 16 * tokens / bits attainable = min(peak_tflops, bw_gbs * I / 1000) bound = "memory-bound" if I < ridge else "compute-bound" batch_to_ridge = ridge * bits / 16 return bound, round(attainable / peak_tflops, 3), round(batch_to_ridge, 1) print(classify(200, 1000, 1, 4.8)) # ('memory-bound', 0.017, 60.0) print(classify(200, 1000, 512, 4.8)) # ('compute-bound', 1.0, 60.0)The ridge is 200 FLOP/byte. One token gives (1.7% of peak); 512 tokens give , past the ridge. About 60 tokens sharing each weight pass are needed to saturate compute at 4.8 bits.
Further reading
- paperWilliams, Waterman & Patterson, Roofline: An Insightful Visual Performance Model for Multicore Architectures (2009)
- docsNVIDIA, GPU Performance Background User's Guide (arithmetic intensity, math- vs memory-limited operations)
- paperMishra et al., Accelerating Sparse Deep Neural Networks (2021)
- bookAustin et al. (Google DeepMind), How to Scale Your Model: A Systems View of LLMs on TPUs (2025)
- paperPope, Douglas, Chowdhery, Devlin, Bradbury, Levskaya, Heek, Xiao, Agrawal & Dean, Efficiently Scaling Transformer Inference (2022)
Go further
Sources
- Tom's Hardware: Nvidia GeForce RTX 5090 review
- NVIDIA DGX Spark User Guide: Hardware Overview
- Tom's Hardware: AMD's Strix Halo Ryzen AI Max debuts with new memory tech
- Local AI Master: Running LLMs on an NPU
- 9to5Mac: Apple unveils next-generation Mac Studio with M5 Max and M5 Ultra
- BuildMVPFast: NPU reality check, what your local AI stack actually uses (August 2026)
- NVIDIA, GPU Performance Background User's Guide
- Mishra et al., Accelerating Sparse Deep Neural Networks (arXiv 2104.08378)
- Apple Developer Forums: recommendedMaxWorkingSetSize and GPU access to unified memory
Fact-checked and last reviewed 2026-11-05